Layout Engineer

Ренесас Дизайн България ЕООД

Renesas Electronics Corporation delivers trusted embedded design innovation with complete semiconductor solutions that enable billions of connected, intelligent devices to enhance the way people work and live. A global leader in microcontrollers, analog, power, and SoC products, Renesas provides comprehensive solutions for a broad range of automotive, industrial, home electronics, office automation, and information communication technology applications that help shape a limitless future.

In 2019 Renesas completed the acquisition of Integrated Design Technology Inc. (IDT). Together with IDT, Renesas delivers an even broader range of leading-edge technology and embedded solutions by combining IDT’s RF, high-performance timing, memory interface, real-time interconnect, optical interconnect, wireless power and smart sensors with Renesas microcontrollers, system-on-chips and power management ICs. This combined portfolio enables the creation of new classes of products and solutions in fast-growing, data-economy applications across different verticals, including industrial, infrastructure and automotive segments, for customers and partners across the globe.

Renesas Design Bulgaria EOOD – former IDT Bulgaria EOOD, was established in 2008 with main focus on design of ASICs and ASSPs for automotive industry, and all related activities. 
Renesas's design centers in Bulgaria are located in Sofia and Varna.

To further strengthen our Automotive sensor division group (including SSC, position sensing and Lidar) at our Sofia location we are looking for an

Analog Layout Engineer (F/M/D) to develop next generation power/mixed signal technologies.

Your Role:
• Create Block level and top level layout according to Renesas product generation process.
• Support in block and top level specifications.
• Implement layout dependent design for Yield.
• Implement layout dependent design for manufacturability.
• Ensure block and top level Design Rule Checks (DRC) and Layout versus Schematics Checks (LVS).
• Ensure Optimized silicon COGS.

Your Profile:
• Relevant educational background.
• Degree in Electronic Engineering, Master preferred.
• Fundamental knowledge about the physics in microelectronics.
• Experience with Cadence Virtuoso.
• Experience with Calibre DRC and LVS layout verification.
• Minimum 1 year professional experience in this field.
• Good communication and technical reporting skills, both written and oral.
• High level of self-motivation and drive.
• Fluent English.

Please note that only shortlisted applicants will be contacted.

• Факултет по Електронна Техника и Технологии

• Експерти | Специалисти